1. Field of Art
This disclosure generally relates to the field of digital circuits, and more specifically to digital divider circuits.
2. Description of the Related Art
A common function in digital circuits is to divide a clock (a digital signal with alternating 1's and 0's) by an integer (e.g., 2) in order to generate a slower clock. For example, a 100 MHz clock having a period of 10 nanoseconds (ns) may be divided by 2 to generate a 50 MHz clock having a period of 20 ns.
Another common function in digital circuits is to divide a clock by an integer N other than 2. For example, in FIG. 1, a 100 MHz clock 101, with a period of 10 ns, could be divided by 16 (N=16) to generate a 6.25 MHz clock 102, with a period of 160 ns. These circuits are well known to those skilled in the art and often include a counter that counts to the correct integer and inverts its output state from 0 to 1 or 1 to 0.
Occasionally, it is necessary to divide a clock by a number that is not an integer. For example, in most 10 G Ethernet transceivers, it is necessary to divide a 5.15625 GHz clock by 16.5 to obtain a 312.5 MHz clock. Dividing a clock by a non-integer number in a digital circuit is much more difficult than dividing by an integer.